Apparatus and Method for Vertically-Structured Passive Components

ABSTRACT

A manufacturing technique for constructing passive electronic components in vertical configurations is disclosed. Electrically passive components are constructed in a structure that is substantially perpendicular to target platform including a first plane to provide a larger electrode contact area and a smaller physical dimension. Passive components structured to be substantially perpendicular to a plane associated with a target platform can be directly connected to pad contacts of an integrated circuit or substrate or can be embedded in a package to reduce the area overhead of a passive component while improving the effectiveness of the passive components in their applications.

RELATED APPLICATIONS

This application claims priority, under 35 U.S.C. §119(e), from U.S.provisional application No. 61/251,617, filed on Oct. 14, 2009, which isincorporated by reference herein in its entirety.

FIELD OF THE INVENTION

This invention relates generally to the manufacture of electroniccomponents, and more particularly to using a structure which issubstantially perpendicular to a first plane of a target platform toimplement passive electronic components.

BACKGROUND OF THE INVENTION

Semiconductor components are often manufactured using a ball grid array(“BGA”) package, where metallic solder balls composing tin, silver andcopper, are pre-soldered at pad contacts of a component package forsoldering the semiconductor component to a target platform, such as aprinted circuit board (“PCB”). Semiconductor components are also oftenmanufactured in a leadless grid array (“LGA”) package where there are nosolder balls at the pad contacts of the package. Instead, a thin layerof solder paste is printed on the metal contacts of a PCB during productassembly to solder the semiconductor component on the PCB.

Other packages are also used in semiconductor component manufacturing.For example, a quad flat-pack package (“QFP”) or a small outlineintegrated circuits package (“SOIC”) uses gull-wing shaped metal leadsattached to the periphery of the package to couple the packagedsemiconductor component to a PCB. As another example, a dual-in-linepackage (“DIP”) or a pin grid array package (“PGA”) sticks metal pins atthe periphery of the package or at the bottom surface of the package forinserting the packaged part into a socket or for soldering it into a setof through-holes on a target platform, such as a PCB. Additionally, aceramic-leaded chip carrier (“CLCC”) package or a plastic-leaded chipcarrier (“PLCC”) package affixes J-shaped metal leads to the peripheryof a packaged semiconductor component for connecting the semiconductorcomponent to a target platform, such as a PCB.

One thing common to many conventional packages for semiconductorcomponent is that nothing more than metal contacts, metal pins, orsolder balls are attached to pad contacts of the packages to connect thesemiconductor component to a target platform.

When using a semiconductor component, such as an integrated circuit(“IC”), passive components, also referred to as “passives,” such asresistors, capacitors or inductors, are often added to make thesemiconductor component function properly. For example, decouplingcapacitors are often connected to the power pins of an IC component tofilter out power noises. A current limiting resistor is often coupled toa driver pin of an IC component to limit driver output current. Or, atermination resistor is often coupled to a signal path to suppressreflection in the high speed trace. Conventionally, these passives areoften placed near the pins of the IC component to which the passive iscoupled in order to maximize their effectiveness. However, thesepassives are placed beyond the IC package outline, which often occupysubstantial area on the target platform and also compete withinterconnect layout routing around the IC component, especially if theIC package has high pin-count.

FIG. 1 illustrates a simplified version of a conventional printedcircuit board (“PCB”) assembly, where a conventional, horizontallystructured passive component 120 and an IC component 130 are soldered toa PCB 100. The IC component 130 includes a set of IC pads 135 which aresoldered to a set of target contacts 115 on PCB 100. Solder ballsconnect the IC pad 135 and the target contact 115 on the PCB. To connecta passive component 120 to a pad of IC component 130 on the PCB 100, twotarget contacts 111 and 112 are added to the surface of PCB 100, wherethe electrodes 121, 122 of the passive component 120 are connected tothe target contacts 111, 112. To connect the electrode 122 of thepassive component 120 to an IC pad 135 in the IC component 130, anadditional PCB trace 114 is added to the surface of PCB 100, whichconnects target contact 112 to a corresponding target contact 115 in ICcomponent 130. In the example depicted by FIG. 1, the passive component120 occupies PCB area, and may also block signal traces around the ICcomponent 130 on the PCB 100.

There is an additional potential problem in using the conventionalpassive components. For mobile or high density electronic products,there is a continuous trend to miniaturize the package size, includingthe supporting passives. For example, the common size of passivecomponents used in a high density DRAM module design has been changedfrom a 0603 package having a dimension of 60 mils in length and 30 milsin width to a smaller 0402 package having a dimension of 40 mils long by20 mils wide. In mobile devices, such as cellular phone, a 0201 packageof 20 mils long by 10 mils wide which further reduces the size of areaoccupied by the passive components becomes more widely used. The currentstate-of-the-art for passive component is a 1005 package having adimension of 10 mils in length and 5 mils in width. This reduced passivesize makes it difficult to solder conventional passive components to atarget platform, such as a PCB, because of the increased likelihood ofinsufficient soldering or solder bridging problems. Much of thedifficulties in soldering smaller passives to a target platformoriginate from the horizontal structure in which most passives arefabricated, with an electrode at each end of the horizontal structure. Asolution that can reduce the target platform area overhead used by thepassive component and while reducing the bridging and/or insufficientsoldering problem encountered by the ultra-small passives during PCBassembly is useful.

SUMMARY OF THE INVENTION

The present invention comprises an electronic device which implements anelectrically passive component in a vertical configuration. Morespecifically, the electronic device is coupled to a target platform thatis positioned substantially in a first plane. The electronic devicecomprises a first surface that is substantially parallel to the firstplane and includes a first contact region. The electronic device alsocomprises a second surface substantially parallel to the first plane andincluding a second contact region. A structure, which is substantiallyperpendicular to the first plane, electrically connects the firstcontact region and the second contact region to implement one or morepassive functions. An insulation sidewall is adjacent and external tothe structure. In an embodiment, the insulation sidewall surrounds atleast one of the first contact region or the second contact region. Forexample, the structure connects the first contact region and the secondcontact region to implement a resistor, a capacitor, an inductor, aconductive path, a diode device or a conductive path. As anotherexample, the structure connects the first contact region and the secondcontact region to implement combinations of passive components, such asa resistor coupled to a capacitor, a resistor coupled to a conductivepath, or other combinations of electrically passive components.

The features and advantages described in the specification are not allinclusive and, in particular, many additional features and advantageswill be apparent to one of ordinary skill in the art in view of thedrawings, specification, and claims. Moreover, it should be noted thatthe language used in the specification has been principally selected forreadability and instructional purposes, and may not have been selectedto delineate or circumscribe the inventive subject matter.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is an illustration of a conventional printed circuit boardassembly.

FIG. 2 is an illustration of example vertically-structured passivecomponents according to an embodiment of the present invention.

FIG. 3 is a comparison of the dimensions of a leadless grid array-52(“LGA-52”) package to the horizontal dimension of a virtually-structuredpassive component according to an embodiment of the present invention.

FIG. 4 is a side-view of an example set of vertically-structured passivecomponents coupled to pad contacts of an integrated circuit componentaccording to embodiments of the present invention.

FIG. 5 is a cross-sectional view of vertically-structured passivecomponents embedded within an integrated circuit component packageaccording to an embodiment of the present invention.

FIG. 6 illustrates examples connection of passive components to asemiconductor integrated circuit component.

FIG. 7 shows cross-sectional views of example implementations ofcombinations of passive components implemented in avertically-structured passive component according to embodiments of thepresent invention.

FIG. 8 shows example implementations of a series connection of aresistor and a capacitor using a vertically-structured passive componentaccording to embodiments of the present invention.

FIG. 9 shows example implementations of a low-pass filter using one ormore vertically-structured passive components according to embodimentsof the present invention.

The Figures depict various embodiments of the present invention forpurposes of illustration only. One skilled in the art will readilyrecognize from the following discussion that alternative embodiments ofthe structures and methods illustrated herein may be employed withoutdeparting from the principles of the invention described herein.

DETAILED DESCRIPTION OF THE INVENTION

A preferred embodiment of the present invention is now described withreference to the Figures where like reference numbers indicate identicalor functionally similar elements. Also in the Figures, the left mostdigits of each reference number correspond to the Figure in which thereference number is first used.

Reference in the specification to “one embodiment” or to “an embodiment”means that a particular feature, structure, or characteristic describedin connection with the embodiments is included in at least oneembodiment of the invention. The appearances of the phrase “in oneembodiment” or “an embodiment” in various places in the specificationare not necessarily all referring to the same embodiment.

Additionally, the language used in the specification has beenprincipally selected for readability and instructional purposes, and maynot have been selected to delineate or circumscribe the inventivesubject matter. Accordingly, the disclosure of the present invention isintended to be illustrative, but not limiting, of the scope of theinvention, which is set forth in the claims.

One embodiment of the invention configures the passive components in avertical structure with terminal electrodes fabricated at the top andthe bottom surfaces of the vertical structure and with an insulationsidewall external to and adjacent to the structure and proximate to oneor more of the electrodes, as shown in FIG. 2. As used herein, the term“vertical” is used to describe any orientation that is substantiallyperpendicular to a target plane. For example, an orientation where thestructure of a passive component is substantially perpendicular to aplane of a target platform, such as a printed circuit board (PCB). Inone embodiment, a vertically structured passive component, or “verticalpassive,” comprises a first surface 220 and a second surface 225parallel to the first surface and below the first surface. The firstsurface 220 includes a first contact region, such as a first electrode201, and the second surface includes a second contact region, such as asecond electrode 202. The vertical structure 200, 250 electricallyconnects the first contact region, such as electrode 201, 251, and thesecond contact region, such as electrode 202, 252 to implement one ormore passive components. For example, the vertical structure 200, 250connects the first contact region and the second contact region toimplement a resistor, a capacitor, an inductor, a conductive path, adiode device or a conductive path. As another example, the verticalstructure 200, 250 connects the first contact region and the secondcontact region to implement a combination of passive components, such asa resistor coupled to a capacitor, a resistor coupled to a conductivepath or other combinations of passive components.

FIG. 2 shows two examples of vertical passives, where one examplevertical passive comprises a square vertical structure 200 whichincludes square contact regions, such as square electrodes 201, 202, anda square insulation sidewall 210 surrounding the square verticalstructure 200. Another example vertical passive component is thecircular vertical structure 250, also shown in FIG. 2. The circularvertical structure 250 includes circular contact regions, such aselectrodes 251, 252, and a circular insulation sidewall 260 around thecircular vertical structure 250. However, the vertical passivecomponents shown in FIG. 2 are merely examples, and in otherembodiments, vertical passives are implemented using vertical structureshaving other geometries, such as rectangular, rhomboidal, hexagonal,octagonal, half-circular or other irregular shapes. Additionally, inother embodiments, vertical passives are implemented using anycombinations of these geometries, such as vertical passive having asquare insulation sidewall and a circular contact region, such as acircular electrode. As shown in FIG. 2, the vertical passive may have afirst axis that is substantially perpendicular to the plane of thetarget platform and a second axis that is substantially parallel to theplane of the target platform. The examples in FIG. 2 are merely forillustration and are not an exhaustive list of possible implementations.

In an embodiment, a vertical passive is sized to be compatible with apad size and pin pitch associated with an integrated circuit (“IC”)component. The horizontal dimension of the vertical passive, such as thediagonal across a square vertical structure or the diameter of acircular vertical structure, may be on the order of millimeters orsmaller. The height of the vertical passive is also in the millimeterrange or smaller. Additionally, in an embodiment, the area of thecontact regions of a vertical passive is large enough to provide a goodcontact with the pad of IC component in a soldered connection or tofacilitate a good contact with the IC component in a solderlessassembly.

A vertical passive may include an insulation sidewall as a protectionlayer, in one embodiment. The insulation sidewall may be adjacent to thevertical passive and external to the vertical passive. The insulationsidewall prevents solder bridging between electrodes and/or prevents anelectrical short between an IC pad and a PCB target contact because oftheir narrow proximity when a thin vertical passive is placed inbetween.

The vertical structure may be used to implement many types of passivecomponents, such as a resistor, a capacitor, an inductor, a ferrite beador other passive components. In an embodiment, the vertical structureincludes a plurality of passive components in a combination structure.The vertical structure also applies to semiconductor devices, such as aZener diode, an ESD protection diode, a light emitting diode (“LED”),other diode devices or other semiconductor devices. In anotherembodiment, the vertical structure comprises a pure insulator orconductor for use as a mechanical support, a capacitor or aninterconnection.

FIG. 3 is an example showing compatibility of a vertical passive withrespect to the pad size and pin pitch of an integrated circuit (“IC”)component and suitability of the vertical passive for connecting to anIC component. FIG. 3 is an excerpt of the pad configuration of aleadless grid array-52 (“LGA-52”) package, which includes circularshaped pads of two different pad sizes. The first pad size is 1.0 mm indiameter, as shown in the leftmost column of FIG. 3. The second pad sizeis smaller, 0.7 mm in diameter, as shown in the right three columns ofFIG. 3. The pad sizes are approximately half of the center distancebetween two nearest pads. In the LGA-52 package, the shortest centerdistance is 1.414 mm for the smaller pads and is 2.00 mm for the largerpads.

In an embodiment, to connect, or place, a vertical passive at a pad ofthe LGA-52 package shown in FIG. 3, two vertical passives arefabricated. A first vertical passive has a contact area diameter of 0.7mm and a second vertical passive has a contact area diameter of 1.0 mm,matching the two pad sizes in LGA-52 package, respectively. In anembodiment where soldering is used to connect a vertical passive to apackage pad contact, it is beneficial to surround the contact areas of avertical passive with a protective insulation sidewall.

For example, if the diameters of two vertical passives, including theinsulation sidewall used in an LGA-52 package, are chosen at 1.1 mm and1.6 mm respectively, which is approximately 80% of the shortest centerdistance between two nearby pads at 1.414 mm and 2.0 mm, respectively,then the insulation sidewalls would have thicknesses of 0.2 mm [i.e.(1.1 mm-0.7 mm) divided by 2] and 0.3 mm [i.e. (1.6 mm-1.0 mm) dividedby 2], respectively. In different embodiments, the insulation sidewallmay be thicker or thinner than these values, as long as the dimension ofinsulation sidewall is sufficient to prevent solder bridging between thetop and bottom electrodes at a vertical passive or to prevent shortingbetween pad contact on a LGA-52 package and target contact on PCB when avertical passive is placed between them. Typically, the height of avertical passive is smaller than the dimension of a horizontal crosssection of the vertical passive.

It can be seen that a vertical passive with a 0.7 mm contact areadiameter and a 1.1 mm sidewall diameter has a larger contact area but asmaller component footprint than a conventional horizontally-structuredpassive in a 0603 package. The contact area of an electrode of ahorizontally-structured passive in a 0603 package is about 0.25 mm×0.75mm, or approximately 0.19 mm². However, the contact area of a verticalpassive having a contact area diameter of 0.7 mm is π×(0.35 mm)² orapproximately 0.38 mm², which is twice the electrode contact area of ahorizontally-structured passive in a 0603 package. The increased contactarea of the vertical passive allows better connection between thevertical passive and the target platform with improved electricalcharacteristics. For example, the larger contact area of the verticalpassive enables a better solder connection between the vertical passiveand the target platform. The physical dimension of vertical passive isalso rather compact. The physical footprint of a vertical passive with a1.1 mm in outer diameter, including the protective insulation sidewall,can be calculated as π×(0.55 mm)² or 0.95 mm², which is slightly smallerthan the horizontal cross-sectional area of a horizontally-structuredpassive in a 0603 package, which is approximately 1.125 mm² (60 mils×30mils or 1.5 mm×0.75 mm).

In different embodiments, the vertical passives are surface mounted orbonded to the pad contact of an IC component. FIG. 4 shows a side viewof an example set of vertical passives mounted to an example integratedcircuit (“IC”) component. The vertical passive 420 with passive contact421, for instance, is soldered to an IC pad contact 401 of IC component400. The insulation sidewall 422 surrounding the vertical passive 420has a dimension larger than the IC pad contact 401 to prevent potentialsolder bridging among the passive contact 423, the passive contact 421and the IC pad contact 401 during soldering or bonding. In oneembodiment, the insulation sidewall is fabricated to protect bothpassive contacts areas 421, 423, as shown by the insulation sidewall422. Alternatively, the insulation sidewall protects a single passivecontact region, as illustrated by the insulation sidewall 424. When theinsulation sidewall 424 protects a single passive contact region, theunprotected passive contact region 425 has a larger area for use as anelectrode by an external connection. In an embodiment, an IC componentsoldered with vertical passives at its pad contacts is coupled to aprinted circuit board (PCB), or other target platform, using a solderedmounting method, a solderless mounting method or any other suitableconnection method, where the passive contact region 423 electronicallycontacts a target contact on the target platform.

In an alternative embodiment, the vertical passive 420 is coupled to ametal pin attached to the periphery of the IC component or to the bottomsurface of the IC component, such as in a pin grid array package (“PGA”)or similar configuration. These metal pins are for inserting intothrough holes or into a socket on a target platform, such as a printedcircuit board (“PCB”). This allows the vertical passive 420 to becoupled to the IC component via the metal pen while remaining detachedfrom the target platform.

As shown in FIG. 4, the vertical passive 420 attached to the ICcomponent 400 is constructed so that the passive contact 421 issubstantially parallel to a plane including the surface of the ICcomponent 400. The passive contact 423 is also substantially parallel tothe plane including the surface of the IC component 400. Hence, thepassive contact 421 and the passive contact 423 are substantiallyparallel to the plane including the surface of the IC component. Astructure is coupled to the passive contact 421 and the passive contact423, electrically connecting or coupling the passive contact 421 and thepassive contact 423 to allow the vertical passive 420 to implement oneor more passive functions. The structure is substantially perpendicularto the plane including the surface of the IC component. By orienting thestructure connecting the passive contact 421 and the passive contact 423substantially perpendicular to the plane including the surface of the ICcomponent 400, one or more passive components may be attachedperpendicular to the pad of the IC component, conserving space on thetarget platform when the IC component 400 is assembled on the targetplatform.

As an alternative to pre-coupling vertical passives to the pad contactsof an IC component or device for subsequent assembly of the IC componentor device on a target platform, a vertical passive may be pre-coupled toa target platform. For example, the vertical passive is pre-soldered tothe target platform. Then an IC component or device is coupled to avertical passive which is coupled to the target platform. In thisembodiment, the pad contacts of the passives soldered to the targetplatform are configured to have an area compatible with the pad contactsof the IC component. In various embodiments, the target platformcomprises a PCB, a packaged IC component, a bare die, a stacked die, apackaged device, a sensor, an electro-optical device, anelectro-mechanical device, a flex or any other suitable platform. In anembodiment, vertical passives are be cascaded vertically, whereresistor, capacitor, and/or inductor, are butted at the passive contactpads on top of each other.

As another alternative embodiment, the vertical passive is embedded in apackage. FIG. 5 illustrates an example integrated circuit (“IC”) packagewith vertical passives embedded in the package. The embedded verticalpassives may be directly attached to a pad contact at the package,directly attached to the pad contact at internal IC component orattached to a pad contact in between the package and the internal ICcomponent.

In FIG. 5, a passive contact 521 of the vertical passive 520, forinstance, is attached to a component contact 511 of an IC component 510included in an IC package 500. The passive contact 522 at the oppositeend of the vertical passive 520 is connected to a package contact 541through an internal conduction path 551. The IC component 510 may be anintegrated circuit die.

Within an IC package, variations in alignment between componentcontacts, passive contacts, or package contacts in an IC package areallowed. Internal conduction paths can be used to connect the packagecontacts, the passive contacts, or the component contacts in the ICpackage, as illustrated by the package internal conduction paths551,552, and 553. Hence, the embedded vertical passives can be placed atlocations that meet the IC package fabrication needs. In some cases,there could be no embedded passive between the component contact and thepackage contact, as the package internal conduction path 554 shown.

The package mold 590, functions similarly to the protective insulationsidewall of a discrete vertical passive. In an embodiment, the packagemold 590 encapsulates the IC component and the embedded verticalpassives while leaving the package contact openings exposed.

In an embodiment, the IC package with embedded vertical passives usesexplicit metal pins, as in the case of DIP or PGA package, to replaceflat contact pads, as in the case of the ball grid array package(“BGA”). Alternatively, the contact pads of the IC package with embeddedpassives are implemented using explicit gull-wing-shaped or J-shapedmetal leads as in the case of quad flat-pack (“QFP”), small outlineintegrated circuits (“SOIC”), plastic-leaded chip carrier (“PLCC”), orceramic-leaded chip carrier (“CLCC”) packages. For solderless assembly,conductive elastomer may be attached to contact pads of IC package.Similarly, the component or device in a package including embeddedvertical passives may be an integrated circuit, a bare die, a stackeddie, a packaged device, a stacked device, a sensor, a diode, or anelectro-mechanical element.

In one embodiment, to couple the vertical passive components to a PCB, athin layer of solder of a few thousandths of an inch (“mils”) ispre-coated at the surface of electrodes at the vertical passives, whichmay replace and obviate the solder paste printing step used intraditional surface mount assembly. Pre-coating the electrode surfaceswith a thin layer of solder may also prevent removal of residual solderpaste remaining on a stencil after printing, reducing environmentalcontaminations.

There are other advantages in using the vertical passives. Becausevertical passives are sandwiched, or embedded, between an integratedcircuit (“IC”) component and a PCB after assembly, the performance ofpassive components is improved, such as providing capacitive charges insitu at the power pin to meet the IC transient switching need. Use ofvertical passives also removes explicit traces that connect passivecomponents to an IC component on a PCB or other target platform,reducing spurious noise. Additionally, the PCB or substrate areaoverhead used by traditional passives is substantially reduced byvertical passives, enabling manufacture of a more compact electronicproduct.

In an embodiment, a vertical passive includes a combination structure oftwo or more passive components. For example, a vertical passive includesa combination structure such as a resistor and a capacitor, a resistorand a conduction path, a capacitor and a conduction path, an inductorand a conduction path, a ferrite bead and a conduction path, a diode anda conduction path, an electro-optical device and a conduction path, aresistor and a capacitor and a conduction path or other combination ofpassive components. In one configuration, a vertical passive including acombination structure has more than two contact regions, such as morethan two electrodes. The combination structure of passive elements maybe implemented by vertically cascading passives or vertically combiningpassives in parallel. Vertical passives including a combinationstructure may be directly coupled to the pad contacts of a package ordirectly embedded in a package to improve effectiveness of thecombination structure of passive components and to minimize the physicalarea occupied by passive components.

FIG. 6 illustrates example connections of passive components, such as acapacitor, or a combination of a capacitor and a resistor to an exampleintegrated circuit (IC) component. In FIG. 6, capacitor C1 is adecoupling capacitor connected to a power input (VCC) of the ICcomponent, indicated as pin 1 in FIG. 6. The pin 2 connection in FIG. 6is a series connection of a resistor and a capacitor, which may be usedin the feedback circuit of an active filter, PWM driver output, or highpass filter. The connection to pin 3, shown in FIG. 6, is a resistor andcapacitor connected to implement a low pass filter. Implementations ofvertical passives and combination structures including two or morepassive elements provide additional details about use of the verticalstructure.

FIG. 7 shows two example implementations of connecting a decouplingcapacitor to a power input pin of an integrated circuit (“IC”) componentusing a vertical passive including a combination structure. The verticalpassive including a combination structure 700 comprises a conductiveplate and path 701 and a companion conductive plate 702. Depending uponthe capacitance requirement, the conductive plates may be interlaced toincrease the capacitance, as shown in vertical passive including acombination structure 700, where the conductive plate and path 701 has areverse “F” shape and the conductive plate 702 has a “C” shape.Alternatively, if a smaller capacitance value is to be implemented, theconductive plate and path 701 may be a simpler inverse “L” shape and theconductive plate 702 may be a flat horizontal plate. Because thedecoupling capacitor C1 shown in FIG. 6 has three connections, i.e. aconnection to the VCC power Pin 1 of IC component, a connection to apower source and a connection to ground, three terminals are used toimplement a vertical passive including a combination structurecomprising a capacitor and a conduction path. Hence, split targetcontacts 711 and 712 are added to the surface of target platform 790. Inan embodiment, the target contact 711 which is connected to a powersource (VCC) on a target platform is in contact with the conductiveplate and path 701 at vertical passive, through which making contactwith the power input pin (pin 1 in FIG. 6) of the IC component,supplying the IC component with power. A capacitor is formed between theconductive plate and path 701 and the conductive plate 702, which isconnected to ground through target contact 712 at the surface of targetplatform 790.

The vertical passive including a combination structure 750 comprises athin conductive path 751 and a thick dielectric 752 surrounding theconductive path 751, which acts as an insulation layer. A capacitor isformed between the pad contact 760 of the IC component and the targetcontact 762 at the surface of target platform 790. This implicitlyprovides the ability to adjust the capacitance value of the verticalpassive including a combination structure 751 by varying the area of thetarget contact 762 connected to ground. Alternatively, a donut shapedpassive contact, similar to the target contact 762, may be fabricated ata first surface of the vertical passive including a combinationstructure 750 and a circular shaped passive contact, similar to the padcontact 760 may be fabricated at a second surface of the verticalpassive including a combination structure 750. Power (VCC) is suppliedto the IC component (e.g., supplied to pin 1 of IC component shown inFIG. 6) through the target contact 761, which is connected to a powersupply (VCC) at the surface of the target platform 790, and through theconductive path 751, which makes electrical contact with the pad contact760 of the IC component.

FIG. 8 shows two example implementations of a capacitor and a resistorconnected in series using a vertical passive including a combinationstructure 800, 850. The vertical passive including a combinationstructure shown in 800 or 850 comprises two passive components stackedalong a first axis that is substantially perpendicular to the targetplatform, where the capacitor is at the top section of the combinationstructure connecting to pad contact of an IC component and the resistoris at the bottom section of the combination structure connecting to thetarget contact at the surface of target platform.

FIG. 9 shows example implementations of a low-pass filter at an ICcomponent pad contact comprising a resistor coupled to a capacitor (“RClow pass filter”) using a vertical passive including a combinationstructure. A vertical passive including a combination structure 900includes a donut shaped passive contact at a first surface forconnecting to a grounded donut shaped pad contact at IC and a circularshaped passive contact at a second surface for contacting RC outputthrough a target contact at the surface of target platform, plus aresistive core with a passive contact connecting to a pad contact of theIC component at the center of the donut shaped passive contact andconnecting to the target contact at the surface of target platform.Alternatively, two vertical passives may be used to implement a RC lowpass filter, where two sets of pads of the IC component and two sets oftarget contacts at the surface of target platform, which are connectedtogether, are used. In another embodiment, components within thevertical passive are oriented so that they are connected along an axisthat is substantially parallel to the target platform.

While particular embodiments and applications of the present inventionhave been illustrated and described herein, it is to be understood thatthe invention is not limited to the precise construction and componentsdisclosed herein and that various modifications, changes, and variationsmay be made in the arrangement, operation, and details of the methodsand apparatuses of the present invention without departing from thespirit and scope of the invention as it is defined in the appendedclaims.

1. A discrete electronic device for connection to a target platformpositioned substantially in a first plane, comprising: a first surfacesubstantially parallel to the first plane, the first surface including afirst contact region; a second surface substantially parallel to thefirst plane, the second surface including a second contact region; astructure coupled to the first contact region and to the second contactregion, the structure electrically connecting the first contact regionand the second contact region to implement one or more passivecomponents and the structure substantially perpendicular to the firstplane; and an insulation sidewall affixed to an exterior surface of thestructure, the insulation sidewall at least partially encirculating atleast one of the first contact region and the second contact region. 2.The electronic device of claim 1, wherein the one or more passivecomponents comprise at least one of a resistor, a capacitor, aninductor, a ferrite bead, a diode device, an insulator or a conductor.3. The electronic device of claim 1, wherein the one or more passivecomponents comprise a conduction path coupled to at least one of aresistor, a capacitor, an inductor or a diode device.
 4. The electronicdevice of claim 1 wherein the one or more passive components comprise aresistor coupled to at least one of a capacitor or an inductor.
 5. Theelectronic device of claim 1, wherein the one or more passive componentscomprise a capacitor coupled to an inductor.
 6. The electronic device ofclaim 1, wherein the one or more passive components comprise a resistor,a capacitor and a conduction path.
 7. The electronic device of claim 1,wherein the one or more passive components comprise a resistor, acapacitor and a conduction path.
 8. The electronic device of claim 1,wherein the one or more passive components comprise a resistor, aninductor and a conduction path.
 9. The electronic device of claim 1,wherein the one or more passive components comprise a capacitor, aninductor and a conduction path.
 10. The electronic device of claim 1,wherein the structure is constructed in a geometry selected from acircular cross-section, a triangular cross-section, a squarecross-section, a rectangular cross-section, a rhomboidal cross-section,a hexagonal cross section, an octagonal cross-section and a half-circlecross-section.
 11. The electronic device of claim 1, wherein at leastone of the first contact region and the second contact region include alayer of solder.
 12. The electronic device of claim 1, wherein the firstcontact region has a cross-section having a first shape and the secondcontact region has a second cross-section having a second shape.
 13. Theelectronic device of claim 12, wherein the first shape is different fromthe second shape.
 14. The electronic device of claim 1, wherein theinsulation sidewall partially surrounding at least one of the firstcontact region and the second contact region.
 15. The electronic deviceof claim 1, wherein a height of the insulation sidewall in a directionsubstantially perpendicular to the first plane is less than across-sectional area of the first surface and a cross-sectional area ofthe second surface.
 16. The electronic device of claim 1, wherein thefirst surface and the second surface are in a horizontal orientation andthe discrete passive component is in a structure substantiallyperpendicular to the first surface and the second surface.
 17. Theelectronic device of claim 1, wherein the first contact region comprisesone or more contact electrodes.
 18. The electronic device of claim 1,wherein the second contact region comprises one or more contactelectrodes.
 19. The electronic device of claim 1, wherein the one ormore passive components are connected within the structure along an axissubstantially perpendicular to the first plane.
 20. The electronicdevice of claim 1, wherein the one or more passive components areconnected within the structure along an axis parallel to the firstplane.
 21. The electronic device of claim 1, wherein the one or morepassive components are butted in parallel within the structure.
 22. Theelectronic device of claim 1, wherein the target platform is a printedcircuit board.
 23. The electronic device of claim 1, wherein the targetplatform is an electronic component.
 24. An electronic packagecomprising: a substrate positioned substantially in a first plane, thesubstrate including an integrated circuit device and a plurality of padcontacts coupled to the integrated circuit device; a plurality ofpassive components, wherein the passive component comprising: a firstsurface including a first contact region, the first surfacesubstantially parallel to the first plane; a second surface including asecond contact region, the second surface substantially parallel to thefirst plane; a structure coupled to the first contact region and to thesecond contact region and substantially perpendicular to the firstplane, the structure electrically connecting the first contact regionand the second contact region to implement one or more passivefunctions; and a plurality of external contact regions for externalaccess; wherein the first contact of the passive component is coupled tothe pad contact; and the second contact region of the passive componentis coupled to the external contact region.
 25. The electronic package ofclaim 24, further comprising: an insulation mold enclosing the substrateand the passive component.
 26. The electronic package of claim 24,wherein the second contact region of the passive component is theexternal contact region.
 27. The electronic package of claim 24, whereinthe pad contact comprises a flat metal contact, a metal contact with asolder ball, a metal pin lead, a J-shaped metal lead, a gull-wing shapedmetal lead or a conduction contact with a conductive elastomer.
 28. Theelectronic package of claim 24, wherein the passive component comprisesa resistor, a capacitor, an inductor, a ferrite bead or a diode device.29. The electronic package of claim 24, wherein the passive componentcomprises a combination of one or more of a resistor, a capacitor, aninductor, a diode device and a conduction path.
 30. The electronicpackage of claim 24, wherein the substrate comprises an integratedcircuit, a bare die, a stacked die, a packaged device, a stacked device,a sensor, an electro-optical device, an electro-mechanical device, aflex or a printed circuit board.
 31. The electronic package of claim 24,wherein the external contact region is affixed with a layer of solder.32. A method for assembling an electronic device comprising the stepsof: identifying a target platform including a target contact region, thetarget platform positioned substantially in a first plane; identifyingan electronic substrate positioned substantially in a second plane, theelectronic substrate including a substrate contact region, a componentcomprising an electronic device and a pad contact region, wherein thesubstrate contact region is coupled to the pad contact region; and avertical passive comprising a first surface including a first contactregion, the first surface substantially parallel to the second plane, asecond surface including a second contact region, the second surfacesubstantially parallel to the second plane and a structure coupled tothe first contact region and to the second contact region, the structuresubstantially perpendicular to the first plane and to the second planeand electrically connecting the first contact region and the secondcontact region to implement one or more passive functions; and couplingthe target contact region to the first contact region; coupling thesubstrate contact region to the second contact region; aligning thesubstrate contact region to the target contact region; and coupling theelectronic substrate to the target platform.
 33. The method of claim 32,wherein the electronic substrate comprises an integrated circuit, a baredie, a stacked die, a packaged device, a stacked device, a sensor, anelectro-optical device, an electro-mechanical device or a flex.
 34. Themethod of claim 32, wherein the target platform comprises an integratedcircuit, a bare die, a stacked die, a packaged device, a stacked device,a sensor, an electro-optical device, an electro-mechanical device, aflex or a printed circuit board.